1. Field of the Invention
This invention relates to a switching circuit for generating clock pulses. More particularly, this invention relates to a novel fast acting switching circuit for generating clock pulses which has a fast rise time and a fast fall time and wherein the switching circuit is normally off and draws only leakage current between periodic clock pulses.
2. Description of the Prior Art
Bistable switching circuits which include flip-flops for generating clock pulses are well known. Heretofore, most bistable switching circuits which included flip-flops have maintained part of the circuit devices active at all times. While active solid state bistable circuits draw less power than other types of bistable circuits, they still require substantially more power in the on state than in the off state.
Dynamic semiconductor memory systems are well known and are commercially available as packaged modules which may be arranged in X, Y and Z memory planes to provide solid state memories for the largest and the fastest computers. One of the disadvantages with dynamic semiconductor memory systems is that the data stored in the volatile semiconductor memory will be lost when the power source fails if no back-up or alternate emergency power source is provided. Most back-up power sources comprise some form of batteries and the back-up power source is usually used to preserve and maintain the essential elements and function of the computer system until normal power is restored. One of the essential functions to be maintained is to maintain the dynamic semiconductor memory refreshed.
Heretofore, it was known that a dynamic semiconductor memory could be refreshed by periodically interrupting the normal read and write operations and supplying a refresh address signal on each of the address lines of the semiconductor memory matrix. It has been common practice to provide an independent and secondary refresh address driving circuit which is turned on at the time power failure is sensed. Heretofore, such refresh address power driving means and clock driving circuits have required a large amount of power to sustain or refresh the dynamic semiconductor memory.